Qwen3.8-Flash-Next MLX 4-bit
Affine MLX quantization of Qwen/Qwen3.8-Flash-Next (qwen4_exp). This is the 4-bit bank the Rindi Flash-Next serve path uses for resident MoE experts, the lm_head, and the MTP drafter on Apple Silicon.
It is not a drop-in for stock mlx-lm until that package has qwen4_exp. It is not the ANE MIL graphs (those are M5/h17 compiled programs and will ship separately).
Files in this repo
| path | role | size |
|---|---|---|
model.safetensors | language weights (experts 4-bit gs64; GDN/attn/embed mostly 8-bit) | ~71 GB |
mtp/mtp-4bit.safetensors | MTP drafter | ~1.4 GB |
model-indexer.safetensors | QSA indexer | ~41 MB |
vision/ | vision tower (unused by the text ANE server) | ~856 MB |
tokenizer + chat_template.jinja | Qwen chat template (low / medium / xhigh) | — |
ngram/ | PLE n-gram embedding table (unmodified official bf16 shards 00006–00036 plus ngram-extra) | ~95 GB |
ngram_index.json | PLE hash constants | — |
The n-gram table is the official Qwen/Qwen3.8-Flash-Next PLE embeddings, not quantized. Without those files the runtime can still load with a zeros PLE fallback.
Recipe
Default 4-bit group size 64. Per-family overrides in config.json:
- experts gate_up / down: 4-bit
- GDN in/out proj, attention, embed, MTP: 8-bit
- router and gated-residual (hyper): 16-bit
Converted on an M5 Max from the official BF16 checkpoint. Do not mix this file with conversions that folded Qwen4ExpRMSNorm's 1+w into the saved gains (those generate noise).
Requirements
- Apple Silicon. The ANE hybrid path that consumes this bank is currently M5 (
h17), ~128 GB unified memory. - A
qwen4_expMLX runtime (local mlx-lm / mlx-vlm checkout, not an old PyPI wheel). - Qwen Community License 1.0 (see
LICENSE). Redistribution of this derivative is allowed; commercial MaaS / coding-assistant products have extra terms in that license.
Acknowledgements
Weights, architecture, and tokenizer: Qwen. Quantization and Apple Silicon packaging: this repository.